[1]YAO Ai-hong,ZHANG Guo-yin,GUAN L in.A survey of dynam ically and partially reconf igurable FPGA-based self-evolvable hardware[J].CAAI Transactions on Intelligent Systems,2008,3(5):436-442.
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A survey of dynam ically and partially reconf igurable FPGA-based self-evolvable hardware
CAAI Transactions on Intelligent Systems[ISSN 1673-4785/CN 23-1538/TP] Volume:
3
Number of periods:
2008 5
Page number:
436-442
Column:
综述
Public date:
2008-10-25
- Title:
- A survey of dynam ically and partially reconf igurable FPGA-based self-evolvable hardware
- CLC:
- TP303
- DOI:
- -
- Abstract:
- The objective of evolvable hardware (EHW) research is the development of automated electronic2circuit design, or a system capable of adap tive alterations to the hardware of its structure. EHW has a great variety of ap2 p lications in fields such as design automation, controllers for autonomous mobile robots, and wireless sensor net2 work nodes. Self2evolutionary hardware comp letes genetic operations and the evaluation of fitness in an on2chip mi2 crop rocessor. The on2chip microp rocessor core of the dynamically and partially reconfigurable field2p rogrammable gate array ( FPGA) runs the genetic algorithm, simulates the evolving p rocess to search for possible circuits, and then sets the on2chip reconfigurable logic so that it runs designswhich are superior to the originalman2made ones, or are op timal designs. In thisway adap tive hardware is possible. When a circuit fails, the self2evolutionary hard2 ware can automatically search for new configurations, using the abundant resources on the chip to rep lace the failed area, realizing the goal of self2repairing hardware. In this paper, the ideas behind self2EHW research, the archi2 tecture of self2EHW and the latest p rogress in the area are studied. The p rimary p roblems to be solved are then summarized. Finally, future research directions are pointed out, such as ways to establish a highly efficient map2 p ing mode between chromosomal encoding of circuits and the configuration bit strings of reconfigurable logic.
- References:
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Last Update:
2009-05-18